One of the largest of these issues is backside chipping. Backside chipping has many potential root causes but the effect is the same lower die strength.
A Study on Chip Thinning Process for Ultra Thin Memory Devices (Toshiba)
Link to the Toshiba White PaperThe chart above is a test on dies ranging from 10um to 25um thick. The results clearly demonstrate that backside chipping (conventional) reduces die strength. Reduced die strength may result in failure during subsequent steps in ultra-thin chips. So what is the answer?
One potential answer is DBG (Dice Before Grind). This process was developed in 1999 by Toshiba and two suppliers stepped up to deliver the solution Disco Corporation and LINTEC Corporation.
1999 DBG Press Release
The above illustration shows the steps in the DBG process. Disco supplies the half-cut dicer (blades) and grinder (grind wheels) and LINTEC supplies the back grind tape laminator (back grind tape) and wafer mounter (pick-up tape). Links to all of the products are listed below.
Back Grind Tape Laminator and Mounter
Half-Cut Dicer and Grinder
Investing in new systems may not be cost effective for smaller companies so there are vendors who offer to process DBG wafers. Contact me for a list of companies who can supply this service. In addition this process can be done using manual equipment on a smaller scale. I can not publish the results or technique here but it there has been significant data collected using semi-auto Disco and LINTEC equipment and if you contact me I would be happy to help design a more cost effective process for lower wafer volumes.
The decision to use the DBG process really depends on the thickness of the die, the package design, and the effect chipping (front side and back side) have on device performance. DBG may not be for every application, but for applications requiring ultra-thin strong dies it will increase die strength and ultimately positively impact yield.