TAIKO Process. Is it viable for TSV production?

TAIKO is a process where a thick wafer is thinned in the center to allow backside development. 

The semiconductor industry is facing a major challenge to increase the speed of certain core technologies without increasing costs to consumers.  At the Flash Memory Conference last year one of the topics was on achieving higher speeds for DRAM in order to support next generation technologies.  The problem is the speed limits of wire bonding have been reached and subsequent technology improvements will require the use of TSV (Through Silicon Vias).

The issue with TSV is one of yield and cost.  The biggest issue today is how to handle thin ground wafers in order to develop the trenchs and backside connection points needed to enable a stack of DRAM dies using TSV.  The common approach is to attach a support to the wafer and then thin the backside.  Every approach used to form the vias relies at some point on handling thinned wafers and the support is required in all process flows.  Debonding and removing the support is problematic which effects yield.  In addition the cost of the support materials is not cheap and adds increasing cost to devices that are marketed to end users that are cost sensitive.

A potential solution is the TAIKO process, but can the TAIKO process be used for TSV production?  The TAIKO process (illustrated below) has one major issue.  It does not protect the circuit side during processing.

Below is a link to a presentation for a way to overcome this issue potentially.
 

TSV H-WSS Alternative Carrier Less Processing


TSV Update Disco October 2012


On the left is a picture of a wafer coated with a protective substance and TAIKO ground.  With no carrier it does not require additional capital investment to remove a carrier or apply an expensive bonding material.  This could be the path forward to enable higher yield lower cost TSV.




Once TSV are formed with TAIKO wafer dicing tape mounter becomes critical.  The reason is the large lip makes it near impossible to mount the dicing tape to the wafer.  A new wafer mounter from LINTEC the RAD-2512F/12 can solve this issue.

LINTEC RAD-2512F/12

TAIKO TSV Wafer Mounter

If the new coating can resist the steps required for various backside development and be used in conjunction with a wafer mounter designed to mount tape to a TAIKO wafer it is possible TAIKO's lower CoO will help enable the next generation of devices.